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2010-2012 Microchip Technology Inc.

DS39977F-page 177

PIC18F66K80 FAMILY

11.3

PORTB, TRISB and

LATB Registers

PORTB is an eight-bit wide, bidirectional port. The

corresponding Data Direction and Output Latch registers

are TRISB and LATB. All pins on PORTB are digital only.

EXAMPLE 11-2:

INITIALIZING PORTB

Each of the PORTB pins has a weak internal pull-up. A

single control bit can turn on all the pull-ups. This is

performed by clearing bit, RBPU (INTCON2<7>). The

weak pull-up is automatically turned off when the port

pin is configured as an output. The pull-ups are

disabled on a Power-on Reset.

Four of the PORTB pins (RB<7:4>) have an

interrupt-on-change feature. Only pins configured as

inputs can cause this interrupt to occur. Any RB<7:4>

pins that are configured as outputs are excluded from

the interrupt-on-change comparison.

Comparisons with the input pins (of RB<7:4>) are

made with the old value latched on the last read of

PORTB. The “mismatch” outputs of RB<7:4> are ORed

together to generate the RB Port Change Interrupt with

Flag bit, RBIF (INTCON<0>).

This

interrupt

can

wake

the

device

from

power-managed modes. To clear the interrupt in the

Interrupt Service Routine:

Perform any read or write of PORTB (except

with the MOVFF (ANY), PORTB instruction).

Wait one instruction cycle (such as executing a

NOP

instruction).

This ends the mismatch condition.

Clear flag bit, RBIF.

A mismatch condition will continue to set flag bit, RBIF.

Reading PORTB will end the mismatch condition and

allow flag bit, RBIF, to be cleared after a one TCY delay.

The interrupt-on-change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt-on-change

feature. Polling of PORTB is not recommended while

using the interrupt-on-change feature.

The RB<3:2> pins are multiplexed as CTMU edge

inputs. RB5 has an additional function for Timer3 and

Timer1. It can be configured for Timer3 clock input or

Timer1 external clock gate input.

CLRF

PORTB

; Initialize PORTB by

; clearing output

; data latches

CLRF

LATB

; Alternate method

; to clear output

; data latches

MOVLW

0CFh

; Value used to

; initialize data

; direction

MOVWF

TRISB

; Set RB<3:0> as inputs

; RB<5:4> as outputs

; RB<7:6> as inputs

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